Arteris Connected Blog

I've received a lot of feedback on the "Interchip Connectivity: HSIC, UniPro, HSI, C2C, LLI...oh my!" article I wrote last year and I thank everyone for their feedback!

Two new options for interchip connectivity are available today that enable sharing a DRAM memory between two chips for data and programs. These standards, called MIPI Low Latency Interface (MIPI LLI) and Chip-to-Chip (C2C), are primarily targeted at mobile phones, where a mobile phone’s modem usually requires its own discreet DRAM. With either C2C or MIPI LLI, the mobile phone modem can use the application processor’s DRAM though a low-latency, memory-mapped connection that requires no software drivers or runtime software.

There has been a lot of confusion about the different standards for interchip connectivity, with many hardware developers of consumer electronics and mobile computing systems-on-chip wondering what to use. As an interconnect IP provider, I struggle with this every day when working with our customers. I wrote this article to share what I have learned.

TI has placed extensive information on their new OMAP5430 and OMAP5432 processors on their web page:  http://www.ti.com/ww/en/omap/omap5/omap5-OMAP5430.html