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Kurt Shuler bio

Kurt Shuler Arteris Intel TI MIT USAFAKurt Shuler is the VP of marketing at Arteris. 

He has held senior roles at Intel, Texas Instruments, ARC International and two startups, Virtio and Tenison. Before working in high technology, Kurt flew as an air commando in the U.S. Air Force Special Operations Forces.

Kurt earned a B.S. in Aeronautical Engineering from the U.S. Air Force Academy and an MBA from the MIT Sloan School of Management.

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Advanced SoC Interconnect IP Enables Greater Flexibility in an Era of Consolidation

  
  
  

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I am thoroughly enjoying 2013. That’s because there seems to be a lot more reason for optimism this year than last year.  But before we let go of 2012, it’s important to reflect on the past year and see what it can teach us so we can make better business decisions moving forward.

The Gartner Hype Cycle & Technology Adoption Lifecycle Explained (using NoC Technology)

  
  
  

noc technology gartner hype cycle

My purpose in this article is to explain Gartner Research’s Hype Cycle and relate it to the Technology Adoption Lifecycle popularized by Geoffrey Moore’s book, “Crossing the Chasm.”  These two models can be used together to provide a combined picture of market expectations and expected technology adoption rates, but people often get the timeframes and takeaways wrong. So if you’re involved in technology as an engineer, marketer or manager, read on!

Who REALLY calls the shots in chip design today?

  
  
  

Arteris System Level Design

Who REALLY calls the shots in chip design today?

That sounds like a stupid question. Who really calls the shots in chip design today? Well, chip designers of course.

Semiconductor M&A?

  
  
  

Arteris System Level Design

As featured in:
Last week a friend of mine was giddy with joy as he exclaimed, “Semi M&A is back!”

It seems Qualcomm’s acquisition of Atheros and Intel’s acquisition of Silicon Hive somehow changed the chemical makeup of his brain, transforming him from an eternal semiconductor market pessimist to a born-again optimist.

Is An FPGA IP Business Model Finally Possible?

  
  
  

Arteris System Level Design

As featured in:
The IP-SoC conference panel, “IPs on FPGA: Strategy and Vision,” was a learning experience for me. Coming from the software and silicon/ASIC/ASSP worlds, I thought I had a pretty comprehensive view of all the various IP licensing models and their technical implementations. But I learned something new that makes me feel positive about the FPGA’s abilities to finally offer a robust market of third party IP. 

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